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Difference between revisions of "NEC SX-ACE HW"

From HLRS Platforms
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** SUPER-UX Unix based OS
** SUPER-UX Unix based OS
** NQSII batch system
** NQSII batch system
** [http://de.nec.com/de_DE/en/documents/SX-ACE-brochure.pdf|NEC SX-ACE brochure]
* Frontend for Cross Compilation
* Frontend for Cross Compilation

Revision as of 18:19, 30 January 2015


  • 64 SX-ACE nodes with a single vector processor
    • 4 cores for 256GFlops peak performance
    • 1 GHz frequency
    • 16 vectore pipes per core, each doing 2 add and 2 multiply per cycle for a peak performance of 64 GFlops per core
    • 1MB ADB (vector cache) per core, enhanced in size, speed and functionality from SX-9
    • 64 GB of memory per node
    • 32 memory channels for 256GB/s bandwidth, usuable by one core or sharable
    • around 260 Watt power consumption per node during Linpack
    • nodes are connected through IXS crossbar for message passing with 4GB/s per node
    • SUPER-UX Unix based OS
    • NQSII batch system
    • SX-ACE brochure

  • Frontend for Cross Compilation
    • Dual socket NEC Express5800/R120e-1M with 2x Intel E5-2697 v2 @ 2.70GHz, running Redhat Linux
  • Filesystem
    • 250TB NEC ScaTeFS (scalable technology filesystem)
    • 2 servers (shared object and metadata servers)
    • 4 NEC iStorage M300 raid arrays with 3TB spindles
  • Network
    • NEC proprietary highspeed network using IXS crossbar for message passing between nodes
    • 4GB/s theoretical MPI bandwidth per node
    • 40G Juniper QFabric network for 10G ethernet connection of filesystem using QOS to separate metadata and data traffic